Table of contents
- 2020.05 - 2020.08
- Engineered a hypervisor-level latency analysis system aimed at optimizing applications with stringent latency requirements.
- 2018.05 - 2017.08
- Analysed latency variability stemming from processor architecture and helped verify proposed solutions.
- 2017.08 - Present
Cyber Physical Systems Integration Lab
Conducted diverse research within the realms of cyber-physical and real-time systems, enhancing functional safety, bolstering system security, and refining temporal predictability.
- Ongoing work on Synergistic Simplex system architecture that harnesses cooperation among safety- and mission-critical elements, as well as between perception and control modules, to enhance the safety and performance of autonomous ground and aerial vehicles.
- Devised Perception Simplex, a system architecture for autonomous vehicles that decouples mission and safety responsibilities, providing verifiable obstacle detection and deterministic collision avoidance within the operational design domain.
- Recognizing the lack of context-aware metrics for object detection in autonomous driving, created Risk Ranked Recall.
- Optimized security auditing for real-time applications, creating Ellipsis. Harnessing the inherent predictability of behaviors in real-time applications, Ellipsis all but eliminates the possibility of audit event loss during typical operation and significantly curtails auditing data volume (> 90%) while preserving security-relevant information.
- Introduced a new memory type, Inner Non-Cacheable, Outer Cacheable, empowering real-time applications to bypass cache coherence mechanisms and mitigate memory access latency variability selectively for shared data, with no impact on private data. Prototype implementation on Linux Kernel and Gem5 simulator, yielded 52% less worst-case latency and negligible impact on performance.
- Helped design security-aware task scheduling for real-time applications and input prioritization schemes for object detection DNN.
- 2015.07 - 2017.07
- Developed device drivers to manage memory bandwidth allocations and participated in kernel bring-up on Tegra Parker SoC.
- Developed the infrastructure to deploy Linux Kernel on the full-chip simulation platform for Tegra Xavier SoC.
- Successfully led a cross-organizational effort to integrate the new full-chip simulation platform with a new regression testing infrastructure.
- Mentored an internship project which overhauled simulator software startup process to create a seamless silicon like flow.
- 2010.07 - 2013.07
- Progressed through roles in CIFS server quality assurance, NFS server maintenance, and finally NFS server development.
- Resolved diverse customer issues and escalations, mitigating active disruptions. Conducted SSH CVE applicability analysis.
- Conceptualized an invention optimizing stale mount points handling within NFS server implementations, resulting in a monetary award.
- 2010.01 - 2010.06
Developed a Perl based Bluetooth device emulator, capable of emulating different Bluetooth Human Interface Devices with random or replay based output.
- 2007.05 - 2007.07
Implementation of a Concurrent Versions System server and a study oriented project on Network Security.
2017.08 - Present
University of Illinois Urbana-Champaign
Systems and Networking
2013.09 - 2015.05
University of Wisconsin-Madison
2006.08 - 2010.07
Birla Institute of Technology and Science Pilani, India
Electrical and Electronics
- 2020.01 - 2020.05
Department of Computer Science, University of Illinois at Urbana-Champaign
Conducted labs and initiated efforts to modernize Embedded System Lab projects. Coordinated the switch to remote working due to COVID-19 shutdowns.
- 2013.08 - 2014.05
Department of Physics, University of Wisconsin-Madison
Conducted labs, tutorials and consultations. Helped develop a new instruction format which focused on inculcating intuition and visualization of classical mechanics.